Validation-Guided Lightweight Attention for Small Chip Surface Defect Detection

Abstract

Small chip-surface defects are difficult to detect because they occupy few pixels and vary across acquisition domains. This study develops a compact YOLOv8n detector through controlled, validation-only ablations while preserving a held-out test set for later model development. The dataset comprised 3,511 real chip images from two source domains and three defect classes. Increasing the input resolution from 416 to 640 pixels improved validation mAP50 from 0.755 to 0.778, with the largest class-level gain for the smallest DIE_INK defects. Adding a stride-4 P2 head increased computation from 8.1 to 12.2 GFLOPs but reduced mAP50 to 0.729. In contrast, placing a convolutional block attention module on the P3 feature map increased mAP50 to 0.797 with a negligible parameter increase, although mAP50-95 decreased slightly from 0.468 to 0.463. Focal loss and a deterministic Dataset-B-style augmentation both degraded the relevant validation metrics. At a validation-selected confidence threshold of 0.15, the detector-supported sorting rule achieved 95.44% three-way decision accuracy and a 5.88% defect false-accept rate. These results show that targeted attention can improve moderate-overlap detection without the cost of an additional high-resolution head, but they also expose unresolved localization, source-domain, and false-accept limitations. The reported values are development-stage validation evidence and are not estimates of final held-out generalization.